The present invention relates to a semiconductor device-mounting substrate that comprises a semiconductor device and a substrate on which the semiconductor device is mounted and which is equipped with a capacitor device.
Concerning a large scale integrated circuit semiconductor device (LSI) in a C-MOS circuit, the current variation as a device is magnified since a large number of circuits are switched on/off simultaneously. Moreover, speeding-up of a signal transmission increases a variation in the transient power supply voltage, thus greatly decreasing an operation margin in the circuit.
With an increase in the circuit integration in recent years and an outstanding development in the speeding-up of the signal transmission in the circuit, there turns out to be less noise margin in the circuit operation. This decrease in the noise margin is now becoming a level at which a malfunction is quite likely to occur.
Accordingly, in order to prevent the malfunction, a capacitor device, which has a capacity ranging from about hundreds of nF to tens of .mu.F, is provided in proximity to a LSI. The capacitor device is then connected with a power supply wiring for driving the LSI, thereby causing the above-described noise to be absorbed so as to prevent the malfunction.
For example, on a substrate such as a central processing circuit substrate in a large-sized electronic computer, a power supply wiring for driving a LSI chip is connected with the above-described capacitor device in the following way: First, tens of LSI chips or tens of package substrates mounting a LSI chip thereon are provided on a multilayer wiring circuit substrate. Then, in order to connect the driving power supply wiring for each of the LSI chips with the capacitor device, the wiring is extracted onto the outside of the region on which the LSI chips or the package substrates mounting a LSI chip thereon are mounted, and a large number of capacitor devices and LSI chips are mounted on the multilayer wiring circuit substrate, thus connecting the driving power supply wiring with the capacitor device.
FIG. 7 shows an example of a prior art multilayer wiring circuit substrate which mounts a large number of package substrates mounting a LSI chip thereon, and a large number of capacitor devices.
A large number of LSI chip-mounting substrates 10, one of which comprises a LSI chip 2 and a wiring substrate 3 mounting it thereon, are mounted on the surface of a circuit substrate 9 such as a ceramic substrate or a printed circuit substrate of a multilayer wiring structure. Also, a large number of capacitor devices 4 are connected onto the periphery of a region on which the LSI chip-mounting substrates are mounted.
Moreover, input/output pins 11, which are designed for connecting the circuit substrate 9 with a large-sized circuit substrate (not illustrated) mounting a plurality of circuit substrates 9 thereon further, are connected with the reverse side of the circuit substrate.
A driving power supply voltage for the semiconductor devices extends from the large-sized circuit substrate (not illustrated), through the input/output pins 11 and a wiring (not illustrated) inside the circuit substrate 9 of a multilayer structure, to the capacitor devices 4 and also to a power supply-driving terminal for the LSI chip 2.
FIG. 8 shows an example of the prior art LSI chip-mounting substrate (package substrate) 10.
The LSI chip-mounting substrate comprises the LSI chip 2 and the wiring substrate 3 for connecting it. The LSI chip is connected onto the surface of the wiring substrate.
As a carrier of the LSI chip, the wiring substrate 3 is installed for ensuring conveniences in the care and handling of the LSI chip and an electrical inspection thereof.
Incidentally, although not illustrated here, there is, in some cases, provided a cap for hermetically sealing the LSI chip in a margin over the surface periphery of the wiring substrate 3.